SoC Engineer

About the Team

OpenAI's Hardware organization develops custom silicon and systems for advanced AI workloads. Our first-party accelerator team works across chip architecture, design, software, and systems to build the computing platforms that power frontier models. We are a small, dynamic team that values technical breadth, hands-on engineering, and creative approaches to building complex hardware.

About the Role

We're looking for a SoC Engineer to help architect, design, and integrate OpenAI's first-party AI accelerators. You will build the processor, interconnect, I/O, and platform infrastructure that connects our accelerator designs into complete, functional systems. This role combines architectural judgment with hands-on implementation. You'll work closely with design, architecture, verification, and software teams throughout development, from defining subsystem requirements and integrating IP to pre-silicon validation, silicon bring-up, and post-silicon debug. You should enjoy stretching across domains, rolling up your sleeves, and doing the work needed to make a complex system function end to end.

In this role, you will:

• Define and implement SoC architectures spanning embedded processors, AMBA interconnects, peripheral subsystems, PCI Express, Ethernet and die-to-die interfaces.
• Develop the microarchitecture and RTL design of subsystems supporting I/O and SoC functionality.
• Integrate Arm Cortex-M and Cortex-A processors, AXI/APB fabrics, and third-party controller IP, including the RTL and glue logic needed to connect these components.
• Develop reset and boot architectures, working with firmware and software teams to define sequencing, initialization, and survivability behavior.
• Incorporate debug, test, and security requirements into the SoC architecture and implementation, partnering with other silicon designers to make the silicon observable, testable, and secure.
• Drive PCIe and other I/O integration, including controller and PHY interfaces, high-speed SerDes, and die-to-die connectivity.
• Contribute to power management and security architecture and design.
• Work directly with third-party IP vendors to define technical requirements, evaluate IP capabilities, coordinate deliverables, and resolve issues from integration through silicon bring-up.
• Work across architecture, design, verification, physical design, and software teams to define interfaces, resolve integration issues, and carry designs through pre-silicon validation and post-silicon bring-up.
• Work closely with Firmware and Software teams to define boot, configuration and runtime behavior and functionality.
• Build and apply automation and AI-assisted tools to accelerate design, IP integration, consistency checking, and debugging while maintaining engineering quality.

You might thrive in this role if you:

• Have experience in SoC architecture, RTL design, and subsystem or full-chip integration, with hands-on ownership through implementation and silicon bring-up.
• Are familiar with Arm processor subsystems, including Cortex-M and Cortex-A, and AMBA protocols and interconnects such as AXI and APB.
• Understand PCIe protocols and have experience configuring, integrating, and debugging controller IP.
• Have experience integrating high-speed I/O, including SerDes/PHY interfaces and die-to-die links.
• Have experience working directly with third-party IP vendors to evaluate technical fit, communicate requirements, and drive integration and debug issues to resolution.
• Understand reset and boot architecture and the interactions between hardware, firmware, and software during initialization and recovery.
• Have experience designing for debug, test, and security, and can reason about how these requirements affect the broader system.
• Are comfortable writing and debugging Verilog/SystemVerilog and building scripts or tools to make integration work more efficient and reliable.
• Enjoy stretching into multiple domains, learning unfamiliar parts of a system, and rolling up your sleeves to build and debug.
• Enjoy working on a small, dynamic team where priorities evolve and engineers take broad ownership.
• Are excited about creatively applying automation and AI tools to hardware design and integration work.